SYSTEM BUILDER FLOW

System Builder Flow

The SSI system builder enables dynamic hardware configuration by transforming a high-level YAML definition into both RTL structures and binary payloads.

Overview

The process is split into two parallel paths to ensure that the hardware "skeleton" (RTL) matches the software "meat" (binary data).

graph TD
    YAML[config_default.yml] --> Mapper[system_config_mapper.py]
    YAML --> Encoder[payload_encoder.py]
    
    Mapper --> RTL[system_config_pkg.vhd]
    Encoder --> BIN[config_schema.hex]
    
    RTL --> Synthesis[Synthesis/Implementation]
    BIN --> ROM[gen_info_pkg.py]
    
    ROM --> InfoPkg[rom_info_pkg.vhd]
    InfoPkg --> Synthesis

1. RTL Skeleton: system_config_mapper.py

This tool parses the YAML configuration and generates src/pkg/system_config_pkg.vhd.

  • Purpose: Defines constants, types, and arrays that the RTL uses to instantiate and connect sniffer/driver blocks.
  • Example: If you define 2 SPI sniffers, this tool generates the constants that tell the system_top to connect 2 SPI instances.

2. Binary Payload: payload_encoder.py

This tool encodes the same YAML file into a raw binary/hex payload: src/regbank/config_schema.hex.

  • Purpose: Provides a machine-readable version of the configuration that can be embedded in FPGA ROM.
  • Why?: The software running on the host/CPU needs to know exactly what sniffers are present and how they are mapped. By embedding this binary blob in the FPGA, the software can query the hardware's own "DNA" at runtime.

3. Integration: gen_info_pkg.py

This final script merges several metadata sources into a single VHDL package: src/pkg/rom_info_pkg.vhd.

  • Metadata included:
    • Git Hash & Build Date.
    • Path to the Regbank Manifest binary.
    • Path to the System Configuration binary.
    • Version strings.

Benefits of this Architecture

  1. Single Source of Truth: Hardware and Software configuration both derive from the same YAML files in tools/system-builder/config/.
  2. Dynamic Adaptation: The host software doesn't need to be recompiled for every minor FPGA configuration change; it simply reads the embedded config_schema.hex to adapt its drivers.
  3. Auditability: The embedded Git Hash and Build Date allow for perfect traceability of every bitstream.