Start a RouteRTL project with an agent.

Build one small project an agent can reason about: a requirement, a declarative project file, a locked dependency, and the first checks. Board validation follows reviewable checks.

$ pip install routertl

Start with docs →Browse registry

agent loop / evidence

requirementhuman-reviewed intent
projectproject.yml
depsip.lock
checkslint · sim · synth
targetsVivado · Quartus · Radiant
hardwaredoctor · hw run
modeagent-driven · engineer-reviewed

T₁ // first project

Install the executor

RouteRTL is the tool surface an agent can call repeatedly. Python 3.10+ is enough for the first loop; vendor tools enter later.

$ pip install routertl

rr command surface

Create one project

Start from a concrete requirement: a sensor hub project that needs a UART path, tests, and a reproducible build.

$ rr init --template sensor_hub --name my_project -y

project.yml

Lock the first dependency

Add a UART IP from the registry. RouteRTL resolves versions, checks license metadata, and writes the lock file an agent can inspect.

$ rr pkg add open-logic/olo_base_uart

ip.lock

Ask for evidence

Before synthesis, make the loop prove something cheap: dependency shape, lint results, and a runnable simulation entry point.

$ rr lint

findings

T₂ // complete loop

Track each step from the requirement to board evidence.

RouteRTL does not replace engineering judgement. It gives an agent a repeatable sequence and produces artifacts to review at every stage. Use rr hardware doctor as the connectivity preflight before board runs.

build queuerr queue submit synth

Long synth, implementation, and bitstream jobs run through the queue so an agent can submit, poll, and preserve the log instead of blocking blindly.

convergence looprr loop open

Budgeted loop sessions give an agent a supervised way to attempt, inspect, and close with evidence rather than grinding until a green bar appears.

T₃$requirements.mdcapture intent

T₄$rr init--template sensor_hub --name my_project -y

T₅$rr pkg addopen-logic/olo_base_uart

T₆$rr testgenolo_base_uart

T₇$rr sim runsim/cocotb/tests/...

T₈$rr synth runqueued target build

T₉$rr bitstream runqueued target build

T₁₀$rr hw runboard contract

T₄ // evidence trail

project.ymltarget, top entity, lint profile, and source roots

ip.lockresolved IP versions, hashes, and licenses

lint findingsstyle and synthesis-risk diagnostics

sim resulttest results and failing assertions

queue jobsynth, implementation, and bitstream logs

hw run.jsonboard validation command, result, and context

Track each step from the requirement to board evidence.

build queuerr queue submit synth

Long synth, implementation, and bitstream jobs run through the queue so an agent can submit, poll, and preserve the log instead of blocking blindly.

convergence looprr loop open

Budgeted loop sessions give an agent a supervised way to attempt, inspect, and close with evidence rather than grinding until a green bar appears.